Upgrading devices in a dispersed storage network

ABSTRACT

A method for execution by a dispersed storage and task (DST) processing unit includes obtaining distributed storage and task network (DSTN) address range information for each memory device of a set of memory devices associated with a storage unit targeted for an upgrade; obtaining a list of slice names associated with selected slices stored in each memory device of the storage unit; retrieving the selected slices associated with the list of slice names; generating an integrity check value for the selected slices; storing one or more of: the integrity check value, the selected slices, or the list of slice names as original integrity information in a memory; and enabling an upgrade sequence of the DST execution unit.

CROSS REFERENCE TO RELATED PATENTS

The present U.S. Utility Patent Application claims priority pursuant to35 U.S.C. § 120 as a continuation of U.S. Utility application Ser. No.15/217,052, entitled “UPGRADING DEVICES IN A DISPERSED STORAGENETWORK,”, filed Jul. 22, 2016, which is a continuation-in-part of U.S.Utility application Ser. No. 13/775,491, entitled “LISTING DATA OBJECTSUSING A HIERARCHICAL DISPERSED STORAGE INDEX”, filed Feb. 25, 2013,which claims priority pursuant to 35 U.S.C. § 119(e) to U.S. ProvisionalApplication No. 61/605,856, entitled “UTILIZING AN INDEX OF ADISTRIBUTED STORAGE AND TASK NETWORK”, filed Mar. 2, 2012, all of whichare hereby incorporated herein by reference in their entirety and madepart of the present U.S. Utility Patent Application for all purposes.

STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

Not Applicable

INCORPORATION-BY-REFERENCE OF MATERIAL SUBMITTED ON A COMPACT DISC

Not applicable.

BACKGROUND OF THE INVENTION Technical Field of the Invention

This invention relates generally to computer networks and moreparticularly to dispersing error encoded data.

Description of Related Art

Computing devices are known to communicate data, process data, and/orstore data. Such computing devices range from wireless smart phones,laptops, tablets, personal computers (PC), work stations, and video gamedevices, to data centers that support millions of web searches, stocktrades, or on-line purchases every day. In general, a computing deviceincludes a central processing unit (CPU), a memory system, userinput/output interfaces, peripheral device interfaces, and aninterconnecting bus structure.

As is further known, a computer may effectively extend its CPU by using“cloud computing” to perform one or more computing functions (e.g., aservice, an application, an algorithm, an arithmetic logic function,etc.) on behalf of the computer. Further, for large services,applications, and/or functions, cloud computing may be performed bymultiple cloud computing resources in a distributed manner to improvethe response time for completion of the service, application, and/orfunction. For example, Hadoop is an open source software framework thatsupports distributed applications enabling application execution bythousands of computers.

In addition to cloud computing, a computer may use “cloud storage” aspart of its memory system. As is known, cloud storage enables a user,via its computer, to store files, applications, etc. on an Internetstorage system. The Internet storage system may include a RAID(redundant array of independent disks) system and/or a dispersed storagesystem that uses an error correction scheme to encode data for storage.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING(S)

FIG. 1 is a schematic block diagram of an embodiment of a dispersed ordistributed storage network (DSN) in accordance with the presentinvention;

FIG. 2 is a schematic block diagram of an embodiment of a computing corein accordance with the present invention;

FIG. 3 is a schematic block diagram of an example of dispersed storageerror encoding of data in accordance with the present invention;

FIG. 4 is a schematic block diagram of a generic example of an errorencoding function in accordance with the present invention;

FIG. 5 is a schematic block diagram of a specific example of an errorencoding function in accordance with the present invention;

FIG. 6 is a schematic block diagram of an example of a slice name of anencoded data slice (EDS) in accordance with the present invention;

FIG. 7 is a schematic block diagram of an example of dispersed storageerror decoding of data in accordance with the present invention;

FIG. 8 is a schematic block diagram of a generic example of an errordecoding function in accordance with the present invention;

FIG. 9 is a schematic block diagram of an embodiment of a dispersed ordistributed storage network (DSN) in accordance with the presentinvention;

FIG. 10A is a flowchart illustrating an example of preparing for anupgrade in accordance with the present invention; and

FIG. 10B is a flowchart illustrating an example of verifying an upgradein accordance with the present invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is a schematic block diagram of an embodiment of a dispersed, ordistributed, storage network (DSN) 10 that includes a plurality ofcomputing devices 12-16, a managing unit 18, an integrity processingunit 20, and a DSN memory 22. The components of the DSN 10 are coupledto a network 24, which may include one or more wireless and/or wirelined communication systems; one or more non-public intranet systemsand/or public internet systems; and/or one or more local area networks(LAN) and/or wide area networks (WAN).

The DSN memory 22 includes a plurality of storage units 36 that may belocated at geographically different sites (e.g., one in Chicago, one inMilwaukee, etc.), at a common site, or a combination thereof. Forexample, if the DSN memory 22 includes eight storage units 36, eachstorage unit is located at a different site. As another example, if theDSN memory 22 includes eight storage units 36, all eight storage unitsare located at the same site. As yet another example, if the DSN memory22 includes eight storage units 36, a first pair of storage units are ata first common site, a second pair of storage units are at a secondcommon site, a third pair of storage units are at a third common site,and a fourth pair of storage units are at a fourth common site. Notethat a DSN memory 22 may include more or less than eight storage units36. Further note that each storage unit 36 includes a computing core (asshown in FIG. 2, or components thereof) and a plurality of memorydevices for storing dispersed error encoded data.

In various embodiments, each of the storage units operates as adistributed storage and task (DST) execution unit, and is operable tostore dispersed error encoded data and/or to execute, in a distributedmanner, one or more tasks on data. The tasks may be a simple function(e.g., a mathematical function, a logic function, an identify function,a find function, a search engine function, a replace function, etc.), acomplex function (e.g., compression, human and/or computer languagetranslation, text-to-voice conversion, voice-to-text conversion, etc.),multiple simple and/or complex functions, one or more algorithms, one ormore applications, etc. Hereafter, a storage unit may be interchangeablyreferred to as a DST execution unit and a set of storage units may beinterchangeably referred to as a set of DST execution units.

Each of the computing devices 12-16, the managing unit 18, and theintegrity processing unit 20 include a computing core 26, which includesnetwork interfaces 30-33. Computing devices 12-16 may each be a portablecomputing device and/or a fixed computing device. A portable computingdevice may be a social networking device, a gaming device, a cell phone,a smart phone, a digital assistant, a digital music player, a digitalvideo player, a laptop computer, a handheld computer, a tablet, a videogame controller, and/or any other portable device that includes acomputing core. A fixed computing device may be a computer (PC), acomputer server, a cable set-top box, a satellite receiver, a televisionset, a printer, a fax machine, home entertainment equipment, a videogame console, and/or any type of home or office computing equipment.Note that each of the managing unit 18 and the integrity processing unit20 may be separate computing devices, may be a common computing device,and/or may be integrated into one or more of the computing devices 12-16and/or into one or more of the storage units 36.

Each interface 30, 32, and 33 includes software and hardware to supportone or more communication links via the network 24 indirectly and/ordirectly. For example, interface 30 supports a communication link (e.g.,wired, wireless, direct, via a LAN, via the network 24, etc.) betweencomputing devices 14 and 16. As another example, interface 32 supportscommunication links (e.g., a wired connection, a wireless connection, aLAN connection, and/or any other type of connection to/from the network24) between computing devices 12 & 16 and the DSN memory 22. As yetanother example, interface 33 supports a communication link for each ofthe managing unit 18 and the integrity processing unit 20 to the network24.

Computing devices 12 and 16 include a dispersed storage (DS) clientmodule 34, which enables the computing device to dispersed storage errorencode and decode data as subsequently described with reference to oneor more of FIGS. 3-8. In this example embodiment, computing device 16functions as a dispersed storage processing agent for computing device14. In this role, computing device 16 dispersed storage error encodesand decodes data on behalf of computing device 14. With the use ofdispersed storage error encoding and decoding, the DSN 10 is tolerant ofa significant number of storage unit failures (the number of failures isbased on parameters of the dispersed storage error encoding function)without loss of data and without the need for a redundant or backupcopies of the data. Further, the DSN 10 stores data for an indefiniteperiod of time without data loss and in a secure manner (e.g., thesystem is very resistant to unauthorized attempts at accessing thedata).

In operation, the managing unit 18 performs DS management services. Forexample, the managing unit 18 establishes distributed data storageparameters (e.g., vault creation, distributed storage parameters,security parameters, billing information, user profile information,etc.) for computing devices 12-14 individually or as part of a group ofuser devices. As a specific example, the managing unit 18 coordinatescreation of a vault (e.g., a virtual memory block associated with aportion of an overall namespace of the DSN) within the DSN memory 22 fora user device, a group of devices, or for public access and establishesper vault dispersed storage (DS) error encoding parameters for a vault.The managing unit 18 facilitates storage of DS error encoding parametersfor each vault by updating registry information of the DSN 10, where theregistry information may be stored in the DSN memory 22, a computingdevice 12-16, the managing unit 18, and/or the integrity processing unit20.

The DSN managing unit 18 creates and stores user profile information(e.g., an access control list (ACL)) in local memory and/or withinmemory of the DSN memory 22. The user profile information includesauthentication information, permissions, and/or the security parameters.The security parameters may include encryption/decryption scheme, one ormore encryption keys, key generation scheme, and/or dataencoding/decoding scheme.

The DSN managing unit 18 creates billing information for a particularuser, a user group, a vault access, public vault access, etc. Forinstance, the DSN managing unit 18 tracks the number of times a useraccesses a non-public vault and/or public vaults, which can be used togenerate a per-access billing information. In another instance, the DSNmanaging unit 18 tracks the amount of data stored and/or retrieved by auser device and/or a user group, which can be used to generate aper-data-amount billing information.

As another example, the managing unit 18 performs network operations,network administration, and/or network maintenance. Network operationsincludes authenticating user data allocation requests (e.g., read and/orwrite requests), managing creation of vaults, establishingauthentication credentials for user devices, adding/deleting components(e.g., user devices, storage units, and/or computing devices with a DSclient module 34) to/from the DSN 10, and/or establishing authenticationcredentials for the storage units 36. Network administration includesmonitoring devices and/or units for failures, maintaining vaultinformation, determining device and/or unit activation status,determining device and/or unit loading, and/or determining any othersystem level operation that affects the performance level of the DSN 10.Network maintenance includes facilitating replacing, upgrading,repairing, and/or expanding a device and/or unit of the DSN 10.

The integrity processing unit 20 performs rebuilding of ‘bad’ or missingencoded data slices. At a high level, the integrity processing unit 20performs rebuilding by periodically attempting to retrieve/list encodeddata slices, and/or slice names of the encoded data slices, from the DSNmemory 22. For retrieved encoded slices, they are checked for errors dueto data corruption, outdated version, etc. If a slice includes an error,it is flagged as a ‘bad’ slice. For encoded data slices that were notreceived and/or not listed, they are flagged as missing slices. Badand/or missing slices are subsequently rebuilt using other retrievedencoded data slices that are deemed to be good slices to produce rebuiltslices. The rebuilt slices are stored in the DSN memory 22.

FIG. 2 is a schematic block diagram of an embodiment of a computing core26 that includes a processing module 50, a memory controller 52, mainmemory 54, a video graphics processing unit 55, an input/output (TO)controller 56, a peripheral component interconnect (PCI) interface 58,an IO interface module 60, at least one IO device interface module 62, aread only memory (ROM) basic input output system (BIOS) 64, and one ormore memory interface modules. The one or more memory interfacemodule(s) includes one or more of a universal serial bus (USB) interfacemodule 66, a host bus adapter (HBA) interface module 68, a networkinterface module 70, a flash interface module 72, a hard drive interfacemodule 74, and a DSN interface module 76.

The DSN interface module 76 functions to mimic a conventional operatingsystem (OS) file system interface (e.g., network file system (NFS),flash file system (FFS), disk file system (DFS), file transfer protocol(FTP), web-based distributed authoring and versioning (WebDAV), etc.)and/or a block memory interface (e.g., small computer system interface(SCSI), internet small computer system interface (iSCSI), etc.). The DSNinterface module 76 and/or the network interface module 70 may functionas one or more of the interface 30-33 of FIG. 1. Note that the IO deviceinterface module 62 and/or the memory interface modules 66-76 may becollectively or individually referred to as IO ports.

FIG. 3 is a schematic block diagram of an example of dispersed storageerror encoding of data. When a computing device 12 or 16 has data tostore it disperse storage error encodes the data in accordance with adispersed storage error encoding process based on dispersed storageerror encoding parameters. Here, the computing device stores data object40, which can include a file (e.g., text, video, audio, etc.), or otherdata arrangement. The dispersed storage error encoding parametersinclude an encoding function (e.g., information dispersal algorithm,Reed-Solomon, Cauchy Reed-Solomon, systematic encoding, non-systematicencoding, on-line codes, etc.), a data segmenting protocol (e.g., datasegment size, fixed, variable, etc.), and per data segment encodingvalues. The per data segment encoding values include a total, or pillarwidth, number (T) of encoded data slices per encoding of a data segmenti.e., in a set of encoded data slices); a decode threshold number (D) ofencoded data slices of a set of encoded data slices that are needed torecover the data segment; a read threshold number (R) of encoded dataslices to indicate a number of encoded data slices per set to be readfrom storage for decoding of the data segment; and/or a write thresholdnumber (W) to indicate a number of encoded data slices per set that mustbe accurately stored before the encoded data segment is deemed to havebeen properly stored. The dispersed storage error encoding parametersmay further include slicing information (e.g., the number of encodeddata slices that will be created for each data segment) and/or slicesecurity information (e.g., per encoded data slice encryption,compression, integrity checksum, etc.).

In the present example, Cauchy Reed-Solomon has been selected as theencoding function (a generic example is shown in FIG. 4 and a specificexample is shown in FIG. 5); the data segmenting protocol is to dividethe data object into fixed sized data segments; and the per data segmentencoding values include: a pillar width of 5, a decode threshold of 3, aread threshold of 4, and a write threshold of 4. In accordance with thedata segmenting protocol, the computing device 12 or 16 divides dataobject 40 into a plurality of fixed sized data segments (e.g., 1 throughY of a fixed size in range of Kilo-bytes to Tera-bytes or more). Thenumber of data segments created is dependent of the size of the data andthe data segmenting protocol.

The computing device 12 or 16 then disperse storage error encodes a datasegment using the selected encoding function (e.g., Cauchy Reed-Solomon)to produce a set of encoded data slices. FIG. 4 illustrates a genericCauchy Reed-Solomon encoding function, which includes an encoding matrix(EM), a data matrix (DM), and a coded matrix (CM). The size of theencoding matrix (EM) is dependent on the pillar width number (T) and thedecode threshold number (D) of selected per data segment encodingvalues. To produce the data matrix (DM), the data segment is dividedinto a plurality of data blocks and the data blocks are arranged into Dnumber of rows with Z data blocks per row. Note that Z is a function ofthe number of data blocks created from the data segment and the decodethreshold number (D). The coded matrix is produced by matrix multiplyingthe data matrix by the encoding matrix.

FIG. 5 illustrates a specific example of Cauchy Reed-Solomon encodingwith a pillar number (T) of five and decode threshold number of three.In this example, a first data segment is divided into twelve data blocks(D1-D12). The coded matrix includes five rows of coded data blocks,where the first row of X11-X14 corresponds to a first encoded data slice(EDS 1_1), the second row of X21-X24 corresponds to a second encodeddata slice (EDS 2_1), the third row of X31-X34 corresponds to a thirdencoded data slice (EDS 3_1), the fourth row of X41-X44 corresponds to afourth encoded data slice (EDS 4_1), and the fifth row of X51-X54corresponds to a fifth encoded data slice (EDS 5_1). Note that thesecond number of the EDS designation corresponds to the data segmentnumber.

Returning to the discussion of FIG. 3, the computing device also createsa slice name (SN) for each encoded data slice (EDS) in the set ofencoded data slices. A typical format for a slice name 80 is shown inFIG. 6. As shown, the slice name (SN) 80 includes a pillar number of theencoded data slice (e.g., one of 1-T), a data segment number (e.g., oneof 1-Y), a vault identifier (ID), a data object identifier (ID), and mayfurther include revision level information of the encoded data slices.The slice name functions as, at least part of, a DSN address for theencoded data slice for storage and retrieval from the DSN memory 22.

As a result of encoding, the computing device 12 or 16 produces aplurality of sets of encoded data slices, which are provided with theirrespective slice names to the storage units for storage. As shown, thefirst set of encoded data slices includes EDS 1_1 through EDS 5_1 andthe first set of slice names includes SN 1_1 through SN 5_1 and the lastset of encoded data slices includes EDS 1_Y through EDS 5_Y and the lastset of slice names includes SN 1_Y through SN 5_Y.

FIG. 7 is a schematic block diagram of an example of dispersed storageerror decoding of a data object that was dispersed storage error encodedand stored in the example of FIG. 4. In this example, the computingdevice 12 or 16 retrieves from the storage units at least the decodethreshold number of encoded data slices per data segment. As a specificexample, the computing device retrieves a read threshold number ofencoded data slices.

To recover a data segment from a decode threshold number of encoded dataslices, the computing device uses a decoding function as shown in FIG.8. As shown, the decoding function is essentially an inverse of theencoding function of FIG. 4. The coded matrix includes a decodethreshold number of rows (e.g., three in this example) and the decodingmatrix in an inversion of the encoding matrix that includes thecorresponding rows of the coded matrix. For example, if the coded matrixincludes rows 1, 2, and 4, the encoding matrix is reduced to rows 1, 2,and 4, and then inverted to produce the decoding matrix.

FIG. 9 is a schematic block diagram of another embodiment of a dispersedstorage network (DSN) that includes a computing device 16 of FIG. 1, thenetwork 24 of FIG. 1, and a plurality of storage units 1-n. Eachcomputing device 16 can include the interface 32 of FIG. 1, thecomputing core 26 of FIG. 1, and the DS client module 34 of FIG. 1. Thecomputing device 16 can function as a dispersed storage processing agentfor computing device 14 as described previously, and may hereafter bereferred to as a distributed storage and task (DST) processing unit.Each storage unit may be implemented utilizing the storage unit 36 ofFIG. 1. The DSN functions to upgrade the storage units 1-n from time totime when hardware and/or software upgrades become available. Inparticular, the integrity of the storage units 1-n can be checked priorto, in preparation for an upgrade, and after an upgrade has taken place.IN the example shown, selected slices for storage unit one are retrievedin the performance of such an integrity check.

In various embodiments, a processing system of a dispersed storage andtask (DST) processing unit includes at least one processor and a memorythat stores operational instructions, that when executed by the at leastone processor cause the processing system to obtain distributed storageand task network (DSTN) address range information for each memory deviceof a set of memory devices associated with a storage unit targeted foran upgrade; obtain a list of slice names associated with selected slicesstored in each memory device of the storage unit; retrieve the selectedslices associated with the list of slice names; generate an integritycheck value for the selected slices; store one or more of: the integritycheck value, the selected slices, or the list of slice names as originalintegrity information; and enable an upgrade sequence of the storageunit.

In various embodiments, obtaining the DSTN address range informationincludes at least one of: receiving the address range information,performing a lookup in a DSTN address to physical location table,generating an address range request, retrieving an address range of aprevious upgrade, or initiating a query requesting the DSTN addressrange information. Obtaining the list of the selected slice names caninclude selecting a portion of the address range based on the DSTNaddress range information, generating a list request, sending the listrequest to the storage unit, and receiving a list response from thestorage unit that includes the list of the selected slice names.Retrieving the selected slices can include generating read slicerequests that includes the selected slice names, sending the read slicerequests to the storage unit, and receiving the selected slices from thestorage.

In addition, the selected slices can include two or more slices for acorresponding slice name of the list of the selected slice names whenmore than one revision is associated with the corresponding slice name.The original integrity information can be stored in a memory associatedwith one of: the storage unit, a DST client module of the DST processingunit, or another storage unit. Generating the integrity check value canutilize a hashing function to produce a hash value over the selectedslices as the integrity check value. Enabling the upgrade sequence caninclude at least one of: caching new slices being written to the storageunit prior to the upgrade sequence, or sending the new slices to analternate storage unit.

The processing system can further operate by retrieving additionalintegrity information for the storage unit; and comparing the additionalintegrity information to the original integrity information, andindicating an unfavorable condition when the comparison is unfavorable.In various embodiments, the additional integrity information can beretrieved for the storage unit after the upgrade sequence. Theprocessing system can further operate by determining that the additionalintegrity information compares unfavorably to the original integrityinformation when the integrity check value fails to match an additionalintegrity check value included in the additional integrity information;initiating a rebuilding process when the additional integrityinformation compares unfavorably to the original integrity information,when the additional integrity information compares unfavorably to theoriginal integrity information, identifying not corrupted slices of thestorage unit; and/or generating an indication that the upgrade sequencewas successful with respect to the not corrupted slices of the storageunit.

While the DST processing unit is described above in conjunction with theoperation of computing unit 16, the audit objects may likewise begenerated by other DST processing units, including integrity processingunit 20 and/or managing unit 18 of FIG. 1.

FIG. 10A is a flowchart illustrating an example of preparing for anupgrade. In particular, a method is presented for use in conjunctionwith one or more functions and features described in conjunction withFIGS. 1-9 is presented for execution by a dispersed storage and task(DST) processing unit that includes a processor or via anotherprocessing system of a dispersed storage network that includes at leastone processor and memory that stores instruction that configure theprocessor or processors to perform the steps described below. Step 830includes obtaining distributed storage and task network (DSTN) addressrange information for each memory device of a set of memory devicesassociated with a DST execution unit targeted for an upgrade (e.g., asoftware upgrade, a hardware upgrade). The obtaining can include atleast one of receiving the address range information, performing alookup in a DSTN address to physical location table, generating anaddress range request, retrieving an address range of a previousupgrade, or initiating a query.

Step 832 includes obtaining a list of at least some slice namesassociated with slices stored in each memory device of the DST executionunit. The obtaining can include includes selecting a portion of theaddress range based on the DSTN address range information, generating alist request, sending the list request to the DST execution unit, andreceiving a list response from the DST execution unit that includes thelist of at least some of the slice names. Step 834 includes retrievingthe slices associated with the at least some of the slice names. Theretrieving can include generating read slice requests that includes theslice names, sending the resource requests to the DST execution unit,and receiving the slices from the DST execution unit. The slices mayinclude two or more slices for each slice name when more than onerevision is associated with the slice name.

Step 836 includes generating an integrity check value for the slices.For example, the processing module utilizes a hashing function toproduce a hash value over the slices as the integrity check value. Step838 includes storing one or more of the integrity check failure, theslices, and the slice names as integrity information in a local memory(e.g., in one or more of the DST execution unit, a memory associatedwith a DST client module, in one or more other DST execution units).Step 840 includes enabling an upgrade sequence of the DST executionunit. The enabling may include caching new slices being written to theDST execution unit prior to the upgrade sequence. The caching mayinclude sending the new slices to an alternate DST execution unit.

FIG. 10B is a flowchart illustrating an example of verifying an upgrade,which include similar steps to FIG. 10A. In particular, a method ispresented for use in conjunction with one or more functions and featuresdescribed in conjunction with FIGS. 1-9 is presented for execution by adispersed storage and task (DST) processing unit that includes aprocessor or via another processing system of a dispersed storagenetwork that includes at least one processor and memory that storesinstruction that configure the processor or processors to perform thesteps described below. Step 842 includes retrieving integrityinformation for a DST execution unit as retrieved integrity information.The retrieving can include identifying a storage location and sending abigger information retrieval request to the storage location. The methodcontinues with the steps 830-836 of FIG. 10A of obtaining distributedstorage and task network (DSTN) address range information for each vaultof each memory device of a set of memory devices of the DST executionunit (e.g., utilizing slice names of the retrieved integrityinformation), obtaining a list of at least some slice names associatedwith slices stored on each memory device of the DST execution unit,retrieving the slices associated with the at least some of the slicenames, and generating an integrity check value for the slices.

Step 844 includes combining the integrity check value, the slices, andthe slice names as integrity information. Step 846 includes comparingthe integrity information compares to the retrieved integrityinformation, and indicating an unfavorable condition when the comparisonis unfavorable. The method can determine that the integrity informationcompares unfavorably to the retrieved integrity information when anintegrity check value is not substantially the same as the retrievedintegrity check value for at least one memory device. In addition, themethod may initiate a rebuilding process when the integrity informationcompares unfavorably to the retrieved integrity information.Alternatively, when the processing system determines that the integrityinformation compares favorably to the retrieved integrity information,the processing system generates an indication that the upgrade wassuccessful with respect to not corrupting slices stored in the DSTexecution unit.

In various embodiments, a non-transitory computer readable storagemedium includes at least one memory section that stores operationalinstructions that, when executed by a processing system of a dispersedstorage network (DSN) that includes a processor and a memory, causes theprocessing system to obtain distributed storage and task network (DSTN)address range information for each memory device of a set of memorydevices associated with a storage unit targeted for an upgrade; obtain alist of slice names associated with selected slices stored in eachmemory device of the storage unit; retrieve the selected slicesassociated with the list of slice names; generate an integrity checkvalue for the selected slices; store one or more of: the integrity checkvalue, the selected slices, or the list of slice names as originalintegrity information; and enable an upgrade sequence of the storageunit.

It is noted that terminologies as may be used herein such as bit stream,stream, signal sequence, etc. (or their equivalents) have been usedinterchangeably to describe digital information whose contentcorresponds to any of a number of desired types (e.g., data, video,speech, audio, etc. any of which may generally be referred to as‘data’).

As may be used herein, the terms “substantially” and “approximately”provides an industry-accepted tolerance for its corresponding termand/or relativity between items. Such an industry-accepted toleranceranges from less than one percent to fifty percent and corresponds to,but is not limited to, component values, integrated circuit processvariations, temperature variations, rise and fall times, and/or thermalnoise. Such relativity between items ranges from a difference of a fewpercent to magnitude differences. As may also be used herein, theterm(s) “configured to”, “operably coupled to”, “coupled to”, and/or“coupling” includes direct coupling between items and/or indirectcoupling between items via an intervening item (e.g., an item includes,but is not limited to, a component, an element, a circuit, and/or amodule) where, for an example of indirect coupling, the intervening itemdoes not modify the information of a signal but may adjust its currentlevel, voltage level, and/or power level. As may further be used herein,inferred coupling (i.e., where one element is coupled to another elementby inference) includes direct and indirect coupling between two items inthe same manner as “coupled to”. As may even further be used herein, theterm “configured to”, “operable to”, “coupled to”, or “operably coupledto” indicates that an item includes one or more of power connections,input(s), output(s), etc., to perform, when activated, one or more itscorresponding functions and may further include inferred coupling to oneor more other items. As may still further be used herein, the term“associated with”, includes direct and/or indirect coupling of separateitems and/or one item being embedded within another item.

As may be used herein, the term “compares favorably”, indicates that acomparison between two or more items, signals, etc., provides a desiredrelationship. For example, when the desired relationship is that signal1 has a greater magnitude than signal 2, a favorable comparison may beachieved when the magnitude of signal 1 is greater than that of signal 2or when the magnitude of signal 2 is less than that of signal 1. As maybe used herein, the term “compares unfavorably”, indicates that acomparison between two or more items, signals, etc., fails to providethe desired relationship.

As may also be used herein, the terms “processing module”, “processingcircuit”, “processor”, and/or “processing unit” may be a singleprocessing device or a plurality of processing devices. Such aprocessing device may be a microprocessor, micro-controller, digitalsignal processor, microcomputer, central processing unit, fieldprogrammable gate array, programmable logic device, state machine, logiccircuitry, analog circuitry, digital circuitry, and/or any device thatmanipulates signals (analog and/or digital) based on hard coding of thecircuitry and/or operational instructions. The processing module,module, processing circuit, and/or processing unit may be, or furtherinclude, memory and/or an integrated memory element, which may be asingle memory device, a plurality of memory devices, and/or embeddedcircuitry of another processing module, module, processing circuit,and/or processing unit. Such a memory device may be a read-only memory,random access memory, volatile memory, non-volatile memory, staticmemory, dynamic memory, flash memory, cache memory, and/or any devicethat stores digital information. Note that if the processing module,module, processing circuit, and/or processing unit includes more thanone processing device, the processing devices may be centrally located(e.g., directly coupled together via a wired and/or wireless busstructure) or may be distributedly located (e.g., cloud computing viaindirect coupling via a local area network and/or a wide area network).Further note that if the processing module, module, processing circuit,and/or processing unit implements one or more of its functions via astate machine, analog circuitry, digital circuitry, and/or logiccircuitry, the memory and/or memory element storing the correspondingoperational instructions may be embedded within, or external to, thecircuitry comprising the state machine, analog circuitry, digitalcircuitry, and/or logic circuitry. Still further note that, the memoryelement may store, and the processing module, module, processingcircuit, and/or processing unit executes, hard coded and/or operationalinstructions corresponding to at least some of the steps and/orfunctions illustrated in one or more of the Figures. Such a memorydevice or memory element can be included in an article of manufacture.

One or more embodiments have been described above with the aid of methodsteps illustrating the performance of specified functions andrelationships thereof. The boundaries and sequence of these functionalbuilding blocks and method steps have been arbitrarily defined hereinfor convenience of description. Alternate boundaries and sequences canbe defined so long as the specified functions and relationships areappropriately performed. Any such alternate boundaries or sequences arethus within the scope and spirit of the claims. Further, the boundariesof these functional building blocks have been arbitrarily defined forconvenience of description. Alternate boundaries could be defined aslong as the certain significant functions are appropriately performed.Similarly, flow diagram blocks may also have been arbitrarily definedherein to illustrate certain significant functionality.

To the extent used, the flow diagram block boundaries and sequence couldhave been defined otherwise and still perform the certain significantfunctionality. Such alternate definitions of both functional buildingblocks and flow diagram blocks and sequences are thus within the scopeand spirit of the claims. One of average skill in the art will alsorecognize that the functional building blocks, and other illustrativeblocks, modules and components herein, can be implemented as illustratedor by discrete components, application specific integrated circuits,processors executing appropriate software and the like or anycombination thereof.

In addition, a flow diagram may include a “start” and/or “continue”indication. The “start” and “continue” indications reflect that thesteps presented can optionally be incorporated in or otherwise used inconjunction with other routines. In this context, “start” indicates thebeginning of the first step presented and may be preceded by otheractivities not specifically shown. Further, the “continue” indicationreflects that the steps presented may be performed multiple times and/ormay be succeeded by other activities not specifically shown. Further,while a flow diagram indicates a particular ordering of steps, otherorderings are likewise possible provided that the principles ofcausality are maintained.

The one or more embodiments are used herein to illustrate one or moreaspects, one or more features, one or more concepts, and/or one or moreexamples. A physical embodiment of an apparatus, an article ofmanufacture, a machine, and/or of a process may include one or more ofthe aspects, features, concepts, examples, etc. described with referenceto one or more of the embodiments discussed herein. Further, from figureto figure, the embodiments may incorporate the same or similarly namedfunctions, steps, modules, etc. that may use the same or differentreference numbers and, as such, the functions, steps, modules, etc. maybe the same or similar functions, steps, modules, etc. or differentones.

Unless specifically stated to the contra, signals to, from, and/orbetween elements in a figure of any of the figures presented herein maybe analog or digital, continuous time or discrete time, and single-endedor differential. For instance, if a signal path is shown as asingle-ended path, it also represents a differential signal path.Similarly, if a signal path is shown as a differential path, it alsorepresents a single-ended signal path. While one or more particulararchitectures are described herein, other architectures can likewise beimplemented that use one or more data buses not expressly shown, directconnectivity between elements, and/or indirect coupling between otherelements as recognized by one of average skill in the art.

The term “module” is used in the description of one or more of theembodiments. A module implements one or more functions via a device suchas a processor or other processing device or other hardware that mayinclude or operate in association with a memory that stores operationalinstructions. A module may operate independently and/or in conjunctionwith software and/or firmware. As also used herein, a module may containone or more sub-modules, each of which may be one or more modules.

As may further be used herein, a computer readable memory includes oneor more memory elements. A memory element may be a separate memorydevice, multiple memory devices, or a set of memory locations within amemory device. Such a memory device may be a read-only memory, randomaccess memory, volatile memory, non-volatile memory, static memory,dynamic memory, flash memory, cache memory, and/or any device thatstores digital information. The memory device may be in a form a solidstate memory, a hard drive memory, cloud memory, thumb drive, servermemory, computing device memory, and/or other physical medium forstoring digital information.

While particular combinations of various functions and features of theone or more embodiments have been expressly described herein, othercombinations of these features and functions are likewise possible. Thepresent disclosure is not limited by the particular examples disclosedherein and expressly incorporates these other combinations.

What is claimed is:
 1. A method for execution by a dispersed storage andtask (DST) processing unit that includes a processor, the methodcomprises: obtaining a list of slice names associated with selectedslices stored in a storage unit, wherein a data segment was dispersedstorage error encoded to produce a set of encoded data slices forstorage in a set of storage units that includes the storage unit, andwherein the set of encoded data slices includes at least one of theselected slices; retrieving the selected slices associated with the listof slice names; generating an integrity check value for the selectedslices; storing one or more of: the integrity check value, the selectedslices, or the list of slice names as original integrity information ina memory; enabling an upgrade sequence of the storage unit; retrievingadditional integrity information for the storage unit; and comparing theadditional integrity information to the original integrity information,and indicating an unfavorable condition when the comparison isunfavorable.
 2. The method of claim 1 wherein the storage unit istargeted for an upgrade.
 3. The method of claim 1 wherein obtaining thelist of the selected slice names includes selecting a portion of anaddress range based on DSTN address range information, generating a listrequest, sending the list request to the storage unit, and receiving alist response from the storage unit that includes the list of theselected slice names.
 4. The method of claim 1 wherein retrieving theselected slices includes generating read slice requests that includesthe selected slice names, sending the read slice requests to the storageunit, and receiving the selected slices from the storage.
 5. The methodof claim 1 wherein the selected slices include two or more slices for acorresponding slice name of the list of the selected slice names whenmore than one revision is associated with the corresponding slice name.6. The method of claim 1 wherein the memory is associated with one of:the storage unit, a DST client module of the DST processing unit, oranother storage unit.
 7. The method of claim 1 wherein generating theintegrity check value utilizes a hashing function to produce a hashvalue over the selected slices as the integrity check value.
 8. Themethod of claim 1 wherein enabling the upgrade sequence includes atleast one of: caching new slices being written to the storage unit priorto the upgrade sequence, or sending the new slices to an alternatestorage unit.
 9. The method of claim 1 further comprising: when theadditional integrity information compares unfavorably to the originalintegrity information, identifying not corrupted slices of the storageunit.
 10. The method of claim 9 further comprising: generating anindication that the upgrade sequence was successful with respect to thenot corrupted slices of the storage unit.
 11. The method of claim 1wherein the additional integrity information is retrieved for thestorage unit after the upgrade sequence.
 12. The method of claim 1further comprising: determining that the additional integrityinformation compares unfavorably to the original integrity informationwhen the integrity check value fails to match an additional integritycheck value included in the additional integrity information.
 13. Themethod of claim 1 further comprising: initiating a rebuilding processwhen the additional integrity information compares unfavorably to theoriginal integrity information.
 14. A processing system of a dispersedstorage and task (DST) processing unit comprises: at least oneprocessor; a memory that stores operational instructions, that whenexecuted by the at least one processor cause the processing system to:obtain a list of slice names associated with selected slices stored in astorage unit, wherein a data segment was dispersed storage error encodedto produce a set of encoded data slices for storage in a set of storageunits that includes the storage unit, and wherein the set of encodeddata slices includes at least one of the selected slices; retrieve theselected slices associated with the list of slice names; generate anintegrity check value for the selected slices; store one or more of: theintegrity check value, the selected slices, or the list of slice namesas original integrity information; enable an upgrade sequence of thestorage unit; retrieve additional integrity information for the storageunit; and compare the additional integrity information to the originalintegrity information, and indicate an unfavorable condition when thecomparison is unfavorable.
 15. The processing system of claim 14 whereinobtaining the DSTN address range information includes at least one of:receiving the DSTN address range information, performing a lookup in aDSTN address to physical location table, generating an address rangerequest, retrieving an address range of a previous upgrade, orinitiating a query requesting the DSTN address range information. 16.The processing system of claim 14 wherein obtaining the list of theselected slice names includes selecting a portion of an address rangebased on DSTN address range information, generating a list request,sending the list request to the storage unit, and receiving a listresponse from the storage unit that includes the list of the selectedslice names.
 17. The processing system of claim 14 wherein retrievingthe selected slices includes generating read slice requests thatincludes the selected slice names, sending the read slice requests tothe storage unit, and receiving the selected slices from the storage.18. The processing system of claim 14 wherein the selected slicesinclude two or more slices for a corresponding slice name of the list ofthe selected slice names when more than one revision is associated withthe corresponding slice name.
 19. The processing system of claim 14wherein enabling the upgrade sequence includes at least one of: cachingnew slices being written to the storage unit prior to the upgradesequence, or sending the new slices to an alternate storage unit.
 20. Anon-transitory computer readable storage medium comprises: at least onememory section that stores operational instructions that, when executedby a processing system of a dispersed storage network (DSN) thatincludes a processor and a memory, causes the processing system to:obtain a list of slice names associated with selected slices stored in astorage unit, wherein a data segment was dispersed storage error encodedto produce a set of encoded data slices for storage in a set of storageunits that includes the storage unit, and wherein the set of encodeddata slices includes at least one of the selected slices; retrieve theselected slices associated with the list of slice names; generate anintegrity check value for the selected slices; store one or more of: theintegrity check value, the selected slices, or the list of slice namesas original integrity information in a memory; enable an upgradesequence of the storage unit; retrieve additional integrity informationfor the storage unit; and compare the additional integrity informationto the original integrity information, and indicate an unfavorablecondition when the comparison is unfavorable.